Shallow trench isolation (STI) structures have been widely used as isolation structures within semiconductor devices. These STI structures are advantageous to miniaturization of semiconductor devices because a size of field area is limited to a desired size of trench by forming a trench in a semiconductor substrate and filling the trench with insulation material. Conventional techniques for these STI structures are disclosed in U.S. Pat. Nos. 6,004,864, 5,915,195, and 4,693,781. A conventional method for fabricating an STI structure is described below.
FIGS. 1a to 1d are sectional views showing a conventional STI fabrication method. First, as shown in FIG. 1a, a pad oxide film 2 is deposited at a thickness of about 200 Å on an entire surface of a silicon substrate 1, a silicon nitride film 3 is deposited at a thickness of about 2,000 Å on the pad oxide film 2, a photosensitive film is applied and exposed on the silicon nitride film 3, and then a pattern of photosensitive film 4 is formed by removing only the photosensitive film on a region to be formed with a trench. Next, as shown in FIG. 1b, a trench 100 is formed in the silicon substrate 1 by dry etching the silicon nitride film 3 exposed, the pad oxide film 2 and the silicon substrate 1 up to a predetermined depth using the pattern of photosensitive film 4 as a mask, the pattern of photosensitive film 4 is removed, and then a cleaning process is performed. By the way, an edge at which a side and a bottom of the formed trench 100 intersect forms a right angle. It is very difficult to decrease this angle so that the edge is gently slanted. Next, as shown in FIG. 1c, a liner oxide film 5 is formed at an inner wall of the trench 100 using a thermal diffusion process. At this time, the liner oxide film 5 is formed at about 60% of its total thickness inside the silicon substrate 1 and at about 40% of the total thickness outside the silicon substrate 1 by a typical thermal diffusion process, centering at a surface (shown as a dotted line in FIG. 1c) of the silicon substrate 1 of the trench. During the thermal diffusion process for the formation of the liner oxide film 5, as an angle of an edge at which a side and a bottom of the trench 100 intersect becomes smaller, oxygen molecules have more difficulty penetrating into the silicon substrate. A nearly vertical edge provides a condition under which oxygen molecules cannot easily penetrate into the silicon substrate. Therefore, a lower surface of the liner oxide film 5 located inside the silicon substrate 1 has a smooth curve at the edge of the trench, while an upper surface of the liner oxide film 5 located outside the silicon substrate 1 keeps a nearly vertical edge angle formed before the thermal diffusion process.
Next, as shown in FIG. 1d, a field oxide 6 is thickly deposited on an entire surface of the silicon nitride film 3 including the liner oxide film 5 such that the trench 100 is sufficiently filled. Since the field oxide 6 is deposited with a surface state as shown as a dotted line in FIG. 1d, a void 200 is generated without complete filling of the trench when the field oxide 6 is formed on the top surface of the liner oxide film 5 having the nearly vertical edge angle. If this void 200 is excessive, it is exposed when a chemical and mechanical polishing for planarization of the filed oxide 6 is performed later, which results in increased difficulty of the planarization.
In addition, in a state where the void is exposed after the planarization, when a polysilicon to be deposited for formation of an electrode in a subsequent process enters the void, a leakage current that causes an erroneous operation of a device is produced, and a circuit-short between adjacent devices breaks out, giving a fatal adverse effect on the devices. The above problems become more severe as the width of the trench becomes narrower.